https://hw.dev Short, high-signal posts on meaningful developments in hardware development. What happened, why it matters, what it enables, operator read. en-us Thu, 30 Apr 2026 12:04:39 GMT hw.dev static export https://hw.dev/signal/agileo-semi-eda-freeze3 https://hw.dev/signal/agileo-semi-eda-freeze3 Thu, 30 Apr 2026 12:00:00 GMT Agileo Automation launches Agil'EDA, a software implementation of the SEMI Equipment Data Acquisition standard that decouples high-frequency data collection from equipment control and is already architected for the Freeze 3 gRPC upgrade due mid-2026. signal eda manufacturing tools https://hw.dev/signal/asml-aixtron-fab-capacity-expansion-2026 https://hw.dev/signal/asml-aixtron-fab-capacity-expansion-2026 Thu, 30 Apr 2026 12:00:00 GMT ASML and Aixtron both raised 2026 revenue outlooks this April as AI-driven orders for EUV lithography, SiC, and GaN deposition equipment push wafer fab tool lead times past 12 months. signal semiconductor manufacturing ai-hardware https://hw.dev/signal/tenstorrent-galaxy-blackhole-servers https://hw.dev/signal/tenstorrent-galaxy-blackhole-servers Thu, 30 Apr 2026 12:00:00 GMT Tenstorrent's Galaxy Blackhole 6U server packs 32 Blackhole chips and 23 PFLOPS into a disaggregation-free inference platform, hitting 350 tokens/s on DeepSeek-671B in Blitz mode. signal ai-hardware tools https://hw.dev/signal/uk-ai-hardware-plan-kendall-2026 https://hw.dev/signal/uk-ai-hardware-plan-kendall-2026 Thu, 30 Apr 2026 12:00:00 GMT UK Technology Secretary Liz Kendall announced a national AI hardware plan targeting 5% of the projected $1T AI chip market, while the speech itself exposed Britain's critical gallium supply-chain vulnerability. signal ai-hardware semiconductor supply-chain https://hw.dev/signal/cadence-revenue-forecast-ai-eda-2026 https://hw.dev/signal/cadence-revenue-forecast-ai-eda-2026 Wed, 29 Apr 2026 12:00:00 GMT Cadence raised its 2026 revenue forecast to $6.13-6.23B (up from $5.9-6B) as AI SoC complexity drives EDA demand, beating Q1 estimates on both revenue and adjusted EPS. signal eda ai-hardware tools https://hw.dev/signal/google-tpu-8t-8i-agentic-era https://hw.dev/signal/google-tpu-8t-8i-agentic-era Wed, 29 Apr 2026 12:00:00 GMT Google's 8th-gen TPU splits into two purpose-built chips: TPU 8t for training at 121 ExaFlops per superpod, and TPU 8i for low-latency inference with 3x the on-chip SRAM of its predecessor. signal ai-hardware semiconductor https://hw.dev/signal/pcb-signoff-hyperlynx-drc-automation https://hw.dev/signal/pcb-signoff-hyperlynx-drc-automation Wed, 29 Apr 2026 12:00:00 GMT Siemens HyperLynx DRC automates PCB electrical signoff across SI, PI, and EMI/EMC domains, shifting rule-based verification earlier in the design cycle and replacing the layer-by-layer manual inspection that misses high-speed net violations. signal pcb eda verification https://hw.dev/signal/risc-v-ai-hardware-open-foundation https://hw.dev/signal/risc-v-ai-hardware-open-foundation Wed, 29 Apr 2026 12:00:00 GMT Jon Peddie Research maps how RISC-V is scaling from always-on keyword detection up through chiplet-based inference SoCs, with three distinct NPU integration architectures now in commercial production. signal risc-v ai-hardware embedded https://hw.dev/signal/chip-sovereignty-systems-not-chips-amd-papermaster https://hw.dev/signal/chip-sovereignty-systems-not-chips-amd-papermaster Tue, 28 Apr 2026 12:00:00 GMT AMD CTO Mark Papermaster and Chip War author Chris Miller argue that semiconductor strategic value has shifted from fab ownership to system architecture -- AI accelerators, advanced packaging, memory bandwidth, and the software stack that ties them together. signal ai-hardware chiplets semiconductor trends https://hw.dev/signal/cisco-universal-quantum-switch https://hw.dev/signal/cisco-universal-quantum-switch Tue, 28 Apr 2026 12:00:00 GMT Cisco's working quantum switch prototype routes quantum information between different vendor systems at room temperature over standard telecom fiber, with only 4% fidelity loss. signal trends testing https://hw.dev/signal/copper-sintering-wbg-die-attach https://hw.dev/signal/copper-sintering-wbg-die-attach Tue, 28 Apr 2026 12:00:00 GMT Copper pressure-assisted sintering is closing in on silver as the preferred die attach method for GaN and SiC power devices, offering comparable thermal conductivity at lower cost and better long-term reliability. signal manufacturing trends https://hw.dev/signal/dram-crunch-ai-system-design https://hw.dev/signal/dram-crunch-ai-system-design Tue, 28 Apr 2026 12:00:00 GMT DRAM prices up 3-4x and high-capacity modules on extended lead times are pushing hardware teams to design AI systems around smaller models and on-chip inference. signal ai-hardware embedded supply-chain https://hw.dev/signal/eu-dare-codasip-riscv-divestiture https://hw.dev/signal/eu-dare-codasip-riscv-divestiture Tue, 28 Apr 2026 12:00:00 GMT Codasip has divested its low-end RISC-V processor business -- and Codasip Studio EDA tool rights -- to an undisclosed U.S. public semiconductor company, leaving the EU's 240M euro DARE supercomputing project searching for a replacement partner. signal risc-v eda semiconductor https://hw.dev/signal/hormuz-semiconductor-helium-supply-chain https://hw.dev/signal/hormuz-semiconductor-helium-supply-chain Tue, 28 Apr 2026 12:00:00 GMT The Strait of Hormuz closure has cut global helium supply and collapsed Gulf air cargo, exposing the semiconductor industry's unhedged dependencies on both -- with cascading effects now visible in memory pricing, tool delivery timelines, and cleanroom operations. signal supply-chain semiconductor manufacturing https://hw.dev/signal/ymtc-nand-xtacking4-new-fab-2026 https://hw.dev/signal/ymtc-nand-xtacking4-new-fab-2026 Tue, 28 Apr 2026 12:00:00 GMT YMTC is building a new NAND fab in Wuhan where over 50% of equipment comes from Chinese domestic suppliers -- a significant shift from pre-sanction fabs -- while its Xtacking 4.0 architecture at 270 layers continues to close the gap with SK Hynix and Samsung. signal semiconductor supply-chain manufacturing https://hw.dev/signal/broadcom-meta-mtia-2nm-accelerator https://hw.dev/signal/broadcom-meta-mtia-2nm-accelerator Mon, 27 Apr 2026 12:00:00 GMT Meta and Broadcom signed a multiyear, multigenerational agreement through 2029 to co-develop Meta's MTIA AI chips, with the first result targeting the industry's first 2nm AI compute accelerator. signal ai-hardware semiconductor https://hw.dev/signal/google-inference-asic-broadcom-marvell-mediatek https://hw.dev/signal/google-inference-asic-broadcom-marvell-mediatek Mon, 27 Apr 2026 12:00:00 GMT Google is running parallel custom ASIC programs at Broadcom, MediaTek, and Marvell -- each optimizing for a different cost and performance point in the inference supply chain, with two million memory processing units potentially in the pipeline. signal ai-hardware semiconductor supply-chain https://hw.dev/signal/qualcomm-samsung-2nm-snapdragon-foundry https://hw.dev/signal/qualcomm-samsung-2nm-snapdragon-foundry Mon, 27 Apr 2026 12:00:00 GMT Qualcomm CEO Cristiano Amon visited Samsung and SK Hynix in Korea to explore manufacturing the Snapdragon 8 Elite 2 on Samsung's SF2 2nm process -- a return to Samsung foundry after a five-year absence driven by dual-sourcing strategy. signal semiconductor supply-chain https://hw.dev/signal/samsung-workers-strike-threat-chip-supply https://hw.dev/signal/samsung-workers-strike-threat-chip-supply Mon, 27 Apr 2026 12:00:00 GMT 40,000 Samsung workers rallied at the Pyeongtaek chip complex demanding a 7% wage hike and elimination of the bonus cap, threatening an 18-day strike starting May 21 if talks fail. signal supply-chain manufacturing semiconductor https://hw.dev/signal/eda-tsmc-angstrom-roadmap-2026 https://hw.dev/signal/eda-tsmc-angstrom-roadmap-2026 Sun, 26 Apr 2026 12:00:00 GMT At TSMC's 2026 North America Technology Symposium, Synopsys, Cadence, and Siemens each announced IP and flow certification for A14/A16/N2 nodes as TSMC extended the roadmap to A13 targeting 2029 production. signal eda semiconductor https://hw.dev/signal/google-tpu8-training-inference-split https://hw.dev/signal/google-tpu8-training-inference-split Sun, 26 Apr 2026 12:00:00 GMT Google's eighth-generation TPU ships as two distinct chips -- 8t for training at 121 ExaFLOPs and 8i for inference -- acknowledging that the two workloads have incompatible hardware requirements. signal ai-hardware semiconductor https://hw.dev/signal/meta-aws-graviton5-agentic-ai https://hw.dev/signal/meta-aws-graviton5-agentic-ai Sun, 26 Apr 2026 12:00:00 GMT Meta signed a multibillion-dollar multi-year deal for hundreds of thousands of AWS Graviton5 CPUs -- 3nm, 192 cores, 5x larger cache than Graviton4 -- to handle agentic AI workloads that GPUs serve inefficiently. signal ai-hardware https://hw.dev/signal/risc-v-embedded-world-2026-automotive https://hw.dev/signal/risc-v-embedded-world-2026-automotive Sun, 26 Apr 2026 12:00:00 GMT Embedded World 2026 confirmed RISC-V is past the exploratory phase: Andes shipped over one million units in a consumer smartwatch, Nuclei has billions of SoCs deployed, and Infineon committed AURIX to RISC-V for next-generation automotive MCUs. signal risc-v embedded https://hw.dev/signal/google-tpu8-million-chip-cluster https://hw.dev/signal/google-tpu8-million-chip-cluster Sat, 25 Apr 2026 12:00:00 GMT Google's eighth-generation TPUs split into dedicated training (8t) and inference (8i) chips, claiming 3x faster training and 80% better performance per dollar -- and the ability to cluster 1 million TPUs together. signal ai-hardware semiconductor https://hw.dev/signal/meta-amazon-graviton-agent-inference https://hw.dev/signal/meta-amazon-graviton-agent-inference Sat, 25 Apr 2026 12:00:00 GMT Meta secured millions of AWS Graviton Arm CPUs for AI agent workloads -- a structural signal that inference for agentic tasks is separating from GPU territory on cost and latency grounds. signal ai-hardware semiconductor trends https://hw.dev/signal/synopsys-cadence-tsmc-angstrom-eda https://hw.dev/signal/synopsys-cadence-tsmc-angstrom-eda Sat, 25 Apr 2026 12:00:00 GMT At the TSMC Technology Symposium, Synopsys and Cadence both certified production flows for N2, A16, and A14 nodes -- Cadence claiming 7% better placed area on 2nm and Synopsys 5.5x 3DIC productivity -- while Siemens confirmed its Canopus AI acquisition targets manufacturing metrology. signal eda semiconductor chiplets https://hw.dev/signal/tsmc-cowos-14x-reticle-system-on-wafer https://hw.dev/signal/tsmc-cowos-14x-reticle-system-on-wafer Sat, 25 Apr 2026 12:00:00 GMT TSMC's 2026 Technology Symposium detailed CoWoS interposers scaling to 14x reticle size and 24 HBM stacks by 2029, with System-on-Wafer targeting 40-plus reticles and 64 HBM stacks -- redefining what 'a chip' means for AI infrastructure. signal semiconductor chiplets manufacturing https://hw.dev/signal/cambridge-hafnium-memristor https://hw.dev/signal/cambridge-hafnium-memristor Fri, 24 Apr 2026 12:00:00 GMT Cambridge researchers built a hafnium oxide memristor that switches at currents a million times lower than existing oxide devices and demonstrates stable analog conductance across tens of thousands of cycles. signal ai-hardware semiconductor embedded https://hw.dev/signal/design-conductor-risc-v-ai-cpu https://hw.dev/signal/design-conductor-risc-v-ai-cpu Fri, 24 Apr 2026 12:00:00 GMT Verkor.io's Design Conductor agentic AI system produced a verified 1.48 GHz RISC-V core from a 219-word spec -- the first end-to-end autonomous CPU design from spec to GDSII layout. signal risc-v eda ai-hardware tools https://hw.dev/signal/siemens-tsmc-ai-eda-collaboration https://hw.dev/signal/siemens-tsmc-ai-eda-collaboration Fri, 24 Apr 2026 12:00:00 GMT Siemens and TSMC certified Fuse EDA AI Agent across N2P, A16, and A14 nodes while extending 3DFabric and silicon photonics support -- a systematic push to make agentic EDA the default, not a beta feature. signal eda ai-hardware semiconductor https://hw.dev/signal/challenger-rp2350-nb-iot-gnss https://hw.dev/signal/challenger-rp2350-nb-iot-gnss Thu, 23 Apr 2026 12:00:00 GMT iLABs' Challenger+ RP2350 board integrates NB-IoT (LTE Cat NB2), GPS/Galileo, and Wi-Fi positioning on a Feather-compatible form factor -- making a compelling case for outdoor IoT trackers without a cellular module hat. signal embedded risc-v aiot https://hw.dev/signal/espressif-esp-claw-edge-ai-esp32 https://hw.dev/signal/espressif-esp-claw-edge-ai-esp32 Thu, 23 Apr 2026 12:00:00 GMT Espressif released ESP-Claw, a Chat-as-Coding edge agent framework that runs LLM-driven decision loops locally on ESP32-S3 hardware -- no cloud required unless you want it. signal embedded ai-hardware aiot https://hw.dev/signal/gigadevice-gd32f5hc-cortex-m33-200mhz https://hw.dev/signal/gigadevice-gd32f5hc-cortex-m33-200mhz Thu, 23 Apr 2026 12:00:00 GMT GigaDevice launched the GD32F5HC, a Cortex-M33 MCU running at 200 MHz with 2MB Flash, TrustZone, and a hardware crypto block -- competing directly in the secure edge compute tier dominated by STM32 and NXP. signal embedded semiconductor testing https://hw.dev/signal/microchip-pic-configurable-logic-blocks https://hw.dev/signal/microchip-pic-configurable-logic-blocks Thu, 23 Apr 2026 12:00:00 GMT Microchip launched two 8-bit PIC families -- PIC16F132 and PIC18-Q35 -- with on-chip Configurable Logic Blocks that let you offload digital glue logic from firmware to hardware without an external CPLD or FPGA. signal embedded fpga tools https://hw.dev/signal/nvidia-nemoclaw-openclaw-hardware-ai-agents https://hw.dev/signal/nvidia-nemoclaw-openclaw-hardware-ai-agents Thu, 23 Apr 2026 12:00:00 GMT NVIDIA's NemoClaw wraps OpenClaw with a sandboxed, policy-enforced security stack -- and what that means for hardware engineers running always-on AI agents is bigger than the press release lets on. signal ai-hardware tools embedded software https://hw.dev/signal/autonomous-pcb-design-2026-guide https://hw.dev/signal/autonomous-pcb-design-2026-guide Wed, 22 Apr 2026 12:00:00 GMT Quilter published a head-to-head comparison of the three leading AI PCB autorouters -- itself, DeepPCB, and Flux.ai -- and the technical differentiation is sharper than the marketing suggests. signal pcb eda tools ai-hardware https://hw.dev/signal/cadence-nvidia-cadencelive-2026 https://hw.dev/signal/cadence-nvidia-cadencelive-2026 Tue, 21 Apr 2026 12:00:00 GMT At CadenceLIVE Silicon Valley, Cadence and Nvidia announced an expanded partnership combining Cadence's EDA and SDA toolchains with Nvidia CUDA-X, AI physics models, and Omniverse -- targeting up to 100x speedups in simulation and verification workflows. signal eda ai-hardware verification tools https://hw.dev/signal/positron-ai-oracle-inference-asimov https://hw.dev/signal/positron-ai-oracle-inference-asimov Tue, 21 Apr 2026 12:00:00 GMT Positron AI has deployed tens of millions of dollars worth of Asimov-based inference systems into Oracle Cloud, targeting mixture-of-experts model inference -- one of the first non-Nvidia, non-AMD chips to reach production scale in a major cloud provider's AI infrastructure. signal ai-hardware semiconductor chiplets https://hw.dev/signal/siemens-eda-agentic-ai-pcb-semiconductor https://hw.dev/signal/siemens-eda-agentic-ai-pcb-semiconductor Tue, 21 Apr 2026 12:00:00 GMT Siemens EDA's product team argues that AI copilots are no longer sufficient -- what the industry needs is an agentic orchestration layer that spans the full design lifecycle from concept to manufacturing sign-off, capable of multi-step reasoning across fragmented EDA toolchains. signal eda pcb verification tools software https://hw.dev/signal/syntacore-zephyr-4-3-risc-v https://hw.dev/signal/syntacore-zephyr-4-3-risc-v Tue, 21 Apr 2026 12:00:00 GMT Syntacore's SCR RISC-V IP portfolio now ships with full, pre-configured Zephyr 4.3 RTOS support including multi-core and out-of-the-box deployment -- a small update with real friction-reduction value for embedded teams starting new RISC-V designs. signal risc-v embedded tools https://hw.dev/signal/cadence-nvidia-physical-ai-digital-twin https://hw.dev/signal/cadence-nvidia-physical-ai-digital-twin Mon, 20 Apr 2026 12:00:00 GMT Cadence and NVIDIA expanded their partnership at CadenceLIVE to integrate the Reality Digital Twin Platform with Omniverse and Isaac, delivering 30x multi-physics simulation speedup on Blackwell GPUs -- targeting the Sim-to-Real gap in robotics and physical AI. signal eda ai-hardware tools software https://hw.dev/signal/siemens-nvidia-trillion-cycle-verification https://hw.dev/signal/siemens-nvidia-trillion-cycle-verification Mon, 20 Apr 2026 12:00:00 GMT Siemens' Veloce proFPGA CS paired with Nvidia GPU architecture promises trillion design cycles in days -- a direct response to verification becoming the dominant bottleneck in AI chip development. signal verification eda ai-hardware fpga tools https://hw.dev/signal/teradyne-testinsight-ate-acquisition https://hw.dev/signal/teradyne-testinsight-ate-acquisition Mon, 20 Apr 2026 12:00:00 GMT Teradyne's acquisition of TestInsight brings pre-silicon validation and automated test pattern generation in-house -- a direct play to reduce the handoff friction between design teams and ATE platforms. signal testing tools semiconductor software verification https://hw.dev/signal/tsmc-56b-capex-3nm-ai-demand https://hw.dev/signal/tsmc-56b-capex-3nm-ai-demand Mon, 20 Apr 2026 12:00:00 GMT TSMC raised its 2026 capex to nearly $56B -- and CEO C.C. Wei acknowledged they'll still fall short of demand in 2027, with three new 3nm fabs racing to come online across Japan, Taiwan, and the US. signal semiconductor manufacturing ai-hardware supply-chain https://hw.dev/signal/cadencelive-2026-ai-agent-stacks https://hw.dev/signal/cadencelive-2026-ai-agent-stacks Sun, 19 Apr 2026 12:00:00 GMT Cadence unveiled a hierarchical agentic AI architecture at CadenceLive, pairing an orchestrator layer with domain-specific super-agents across RTL design and verification — and opened the business model question nobody wants to answer. signal eda ai-hardware tools verification https://hw.dev/signal/eu-dare-codasip-risc-v-pivot https://hw.dev/signal/eu-dare-codasip-risc-v-pivot Sun, 19 Apr 2026 12:00:00 GMT The €240M EU DARE RISC-V initiative is actively replacing Codasip after the Munich-based processor IP company divested key business units to an undisclosed US semiconductor firm, leaving European digital sovereignty plans in flux. signal risc-v embedded supply-chain trends https://hw.dev/signal/intel-terafab-tesla-spacex https://hw.dev/signal/intel-terafab-tesla-spacex Sun, 19 Apr 2026 12:00:00 GMT Intel will partner with Tesla, SpaceX, and xAI to build Terafab — a proposed 100 million square-foot collocated semiconductor campus in Austin targeting one terawatt of annual compute output. signal manufacturing supply-chain ai-hardware trends https://hw.dev/signal/tesla-ai5-tape-out-3nm https://hw.dev/signal/tesla-ai5-tape-out-3nm Sun, 19 Apr 2026 12:00:00 GMT Tesla taped out its AI5 chip on 3nm — dual-sourced from TSMC Arizona and Samsung Taylor — claiming 8-10x the compute of HW4, 192GB LPDDR5X, and a philosophy of stripping away everything that isn't neural network inference. signal ai-hardware chiplets manufacturing embedded https://hw.dev/signal/siemens-fuse-eda-ai-agent https://hw.dev/signal/siemens-fuse-eda-ai-agent Sun, 15 Mar 2026 12:00:00 GMT Siemens announced Fuse EDA AI Agent, a domain-scoped autonomous agent that plans and orchestrates multi-tool workflows spanning design, verification, and manufacturing sign-off for semiconductors, 3D ICs, and PCBs. This is the biggest incumbent response to AI-native EDA challengers yet. signal eda ai-agent pcb semiconductor automation https://hw.dev/signal/risc-v-embedded-world-2026 https://hw.dev/signal/risc-v-embedded-world-2026 Sun, 01 Mar 2026 12:00:00 GMT Embedded World 2026 marked a decisive shift in RISC-V conversations — from architectural promise to production readiness. Automotive-grade cores, AI-native extensions, and wearable deployments (including the Amazfit T-Rex 3 Pro) showed the ISA has crossed the chasm from experimentation to volume production. signal risc-v embedded-world automotive ai production