The EE Journal published an independent evaluation of Quilter's AI-powered PCB layout tool, with a notable result: the AI produced a fully routed, DRC-clean, signal-integrity-verified SBC design that worked in hardware.
Why this benchmark matters:
AI PCB routing has been generating claims for years. "Functional in hardware" is the only metric that matters, and it's the one most vendors avoid specifying. Quilter submitted their tool to an independent evaluation with a real complex design — and it passed.
What makes Quilter's approach different:
Most AI PCB tools treat routing as a pattern-matching or reinforcement learning problem. Quilter's approach is physics-driven — the router understands electromagnetic constraints, impedance control requirements, and thermal distribution natively, rather than learning to approximate them from training data.
The practical result: fewer DRC violations to clean up after the router runs, and signal integrity that holds up to simulation without extensive manual re-routing.
What's still hard:
Component placement remains the hardest part of PCB layout for AI to automate well. Quilter's current tool focuses on routing after human-guided placement. Full placement-to-routing automation for complex multilayer designs (>8 layers, dense BGAs) is still unsolved.
For EE teams evaluating AI EDA tools:
The question to ask vendors is not "can your tool route a board" — it's "can your tool route a board that works in hardware on the first spin." That's the bar. Quilter's 2026 evaluation is the first time a vendor has publicly cleared it with an independent design.
The 2026 AI EDA landscape:
Quilter, Flux.ai, CELUS, and DeepPCB are all approaching this from different angles. The Siemens Fuse EDA announcement signals that the incumbents are watching. The next 18 months will determine which approach — physics-driven, LLM-based, or hybrid — dominates production use.