Embedded World 2026 was the year RISC-V stopped being a topic of conversation and started being a thing on shipping products.
The Amazfit moment:
The RISC-V powered Amazfit T-Rex 3 Pro smartwatch was one of the most visible demonstrations — a consumer product, sold at retail, running a RISC-V processor. Not a dev kit, not a reference design, not a proof of concept. A product.
Automotive traction:
Multiple vendors showed automotive-grade RISC-V IP cores at Embedded World 2026, with flexible ISA extensibility, optional accelerators, and deep customization across architecture and microarchitecture. The emphasis shifted from "can RISC-V do automotive" to "which RISC-V core is right for my zone controller."
AI-native extensions:
The RISC-V vector extension (RVV 1.0) is now stable and well-supported by major toolchains (LLVM, GCC). Vendors are shipping custom AI accelerator instructions as RISC-V extensions — a major advantage of the open ISA. You can define the instruction set your ML workload needs, rather than adapting your workload to someone else's instruction set.
Compatibility and scalability:
The recurring theme from engineers at the show: RISC-V's cross-vendor compatibility has improved dramatically. Code written for one vendor's RISC-V core is increasingly portable to another's without significant rework — a concern that was real 18 months ago and is becoming less relevant.
The takeaway for hardware teams:
If you're designing a new embedded product that will ship in 2027+, evaluating a RISC-V option in your silicon selection process is no longer optional. The ecosystem is there. The toolchain is there. The production volume is building.