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hw.dev
About hw.dev

The intelligence layer for hardware development.

Hardware is catching up to software. hw.dev tracks where that is happening, where it is still broken, and what builders should do about it.

// The thesis

Hardware isn't slow because of physics. It's slow because of coordination, validation, and tooling. Those constraints are starting to break.

The bottleneck is shifting to decision-making. The teams that win will be the ones that compress the loop from idea to validation to decision.

hw.dev exists to track that compression in public: what shifted this week, what shift is underway, what the stack looks like now.

The direction of travel is everything-as-code. Requirements, specs, tests, validation, manufacturing instructions, ECOs, and workflows all belong in version control: diff-able, reviewable, automatable. Tools that resist this (walled-garden PLM, closed-format CAD, spreadsheet-as-source-of-truth, lab-bound T&M benches) are friction the industry is learning to remove.

Testing is the control plane, not a phase. Shift left. Continuous validation. Test infrastructure that runs in CI is infrastructure. AI is evaluated by whether it compresses iteration cycles, reduces coordination cost, or improves decision quality, not by demo polish.

hw.dev is operator-led, not journalist-led. Written by and for people who ship product.

// What we publish

Signal

Short posts on meaningful developments in hardware development. What happened, why it matters, what it enables, operator read. Daily cadence.

Analysis

Long-form essays on the shifts reshaping hardware development: product realization, test, AI, manufacturing, supply chain, CAD, PLM, ERP, validation. Named constraint, named beneficiary, specific builder action.

Stack Maps

Opinionated, living reference maps of the modern hardware development stack. Layers, incumbents, insurgents, named gaps. Updated as the ground moves.

// Editorial

Software-first view of hardware

When in doubt, ask what the software-native version of this workflow looks like.

Process over artifact

How a product gets designed, built, tested, and shipped matters more than the artifact that falls out.

Name the constraint

The best posts identify a constraint being removed. Vague transformation is not a constraint.

No neutral voice

Take a position. If the consensus is lazy, be contrarian on purpose. Both-sidesism is not analysis.

// What we track

//EDA and chip design
//FPGA, RISC-V, open silicon
//Embedded systems and firmware
//PCB design and DFM
//Test, measurement, validation
//ATE modernization, shift-left test
//PLM / CAD / ERP displacement
//Contract manufacturing platforms
//Supply chain and BOM intelligence
//AI in the hardware workflow
//Product realization and requirements
//Hardware CI and everything-as-code

// Future tools

Intelligence is the identity; the tools are the follow-through. As the stack matures, hw.dev will ship opinionated tools where the data and the workflow line up:

  • BOM Intelligence: component data, substitution, supply risk, compliance.
  • Test Intelligence: coverage, regression, shift-left readiness.
  • Validation Intelligence: specs, traceability, sign-off artifacts as code.
  • Supply Chain Intelligence: distributor APIs, availability, obsolescence.
  • Product Realization Intelligence: the spine from requirements to shipped unit.

Each tool ships when the underlying data and workflow are both ready. The intelligence comes first; the tools follow.