This adaptive converter moves a power-stage decision from design time into firmware. Instead of choosing one inductance and switching frequency for a nominal load, the architecture reconfigures both at runtime as load conditions change.
The design flow combines analytical models, FEM simulation, and optimization to generate preferred operating points, then stores them in a lookup table for an on-chip controller. A hysteresis policy protects continuous-conduction operation during sensing delay and fast transients. In simulation, the approach improves average efficiency by 4.5 percentage points and cuts average power loss by as much as 32% against fixed configurations.
The development cost shifts from repeated hardware tuning to validating the policy, its state transitions, and the model behind the table. Within two product cycles, power teams shipping highly dynamic loads will need controller-in-the-loop validation for magnetics, not a single efficiency curve at tapeout.