AMD restructured Vivado licensing in the 2026.1 release and removed Linux from the free Standard tier. Linux developers who want to stay current must now pay $1,200 to $1,800 per year for a subscription or buy a perpetual license at $10,000 or more. The free tier still exists - Windows only. The constraint AMD is imposing is not about device support or feature depth. It is about CI. Every FPGA project running synthesis, place-and-route, and bitstream generation in a Linux CI pipeline now has a $1,200/year line item or a hard freeze.
This is the same structural move that opened the RTL simulation market. When EDA incumbents pulled free-tier Linux support from simulators, the open-source toolchain absorbed the displaced workflows. Yosys, nextpnr, and openFPGALoader already support AMD 7-series devices fully: Artix-7, Kintex-7, and Zynq 7000, the most common targets for CI-native FPGA development. The migration path is not theoretical. Teams running shift-left FPGA workflows have been on this stack for years. Lattice tried a similar reprice on iCEcube2; the open-source toolchain captured that market and has not given it back.
The mid-range Xilinx portfolio - UltraScale, UltraScale+ - is not yet fully covered by open-source tooling, and that is where AMD retains leverage. But the incentive structure just shifted sharply. Teams whose workloads run on Artix-7 or Kintex-7 are now paying $1,200/year for a tool that a free open-source stack already handles. Teams whose workloads require UltraScale pay or stay frozen. AMD's bet is that the UltraScale dependency is sticky enough to hold the paid tier. The open-source ecosystem's bet is that it closes the UltraScale gap before AMD banks on it. Based on Lattice, the smart money is not on the incumbent.