Apollo's latest firmware release candidate now has a physical test record tied to the exact build loaded on both field-programmable gate arrays (FPGAs). Each device passed a 60-second direct memory access test, which moves data without making the processor copy every word, followed by a 600-second test with both devices running at once. The run reported zero wrong words, timeouts, synchronization errors, or failed operations.
The record also names the controller firmware, driver, clock rates, board, branch revision, and hash read back from both chips. That is enough for another engineer to identify what ran and repeat the important part of the test. It also states what is still missing: one package name, two file hashes, and the automated build's timing result. Calling out those gaps is more useful than labeling the candidate fully verified.
This is a good release pattern for programmable hardware: pin the source, read the identity back from the board, and stress all devices together before tagging. Apollo still needs to attach the remaining artifacts, but the release decision already rests on a test another engineer can reproduce instead of a successful build alone.