Applied Materials and Intel are putting equipment development inside the chip R&D loop. Teams at Applied's EPIC Center in Silicon Valley and Intel's Hillsboro campus will work together on transistors, interconnects, and advanced packaging for AI chips. The old handoff was a tool supplier delivering capability and a chipmaker spending another cycle proving whether it fits the device architecture.
The work spans front-end and back-end process development, interconnect scaling, and Foveros-based 3D stacking for higher interconnect density, power delivery, and thermal performance. Intel gets earlier access to Applied's equipment and process portfolio. Applied gets multi-node visibility before requirements harden, which should steer equipment R&D toward process modules that can transfer into manufacturing.
The EPIC Center is scheduled to be operationally ready in 2026. By the end of 2027, the collaboration should produce a measured reduction in the interval from materials experiment to a qualified manufacturing module. Equipment suppliers that wait for a frozen node specification will lose the most valuable learning cycle.