Autoregressive LLMs regenerate the full sequence context on every step. Block-diffusion LLMs make completed sequence blocks immutable, which means those blocks are exactly cacheable and never need to be recomputed. That difference is not an algorithmic curiosity. It is a different memory access pattern, and the hardware you build for one does not perform well on the other. This paper co-designs three memory system primitives for block-diffusion inference on edge LPDDR platforms and quantifies the penalty for ignoring this: 3.79x-3.96x energy reduction on 1.5B and 7B parameter models, 2.88x-4.44x latency speedup, with benchmark accuracy staying within one absolute percentage point of the uncompressed baseline.
The co-design covers three layers. WIFiV-LPDDR adds precision-tagged reads to the LPDDR interface, letting the memory controller treat immutable-prefix data and live-activation data with different fetch and precision strategies. BRQ-KV manages the prefix KV cache as a low-rank plus INT8-residual structure with query-dependent per-entry precision, amortizing prefix cost across all diffusion steps. DAT-FFN applies drift-mapped delta compression for FFN weights, carrying cached state across adjacent diffusion stages while keeping live activations unquantized. All three primitives map to an input-stationary mixed-precision systolic array. The systolic array is not the novel contribution; the memory interface contracts that make block immutability visible to the compute fabric are.
Edge AI silicon teams that have not updated their target workload spec from autoregressive to diffusion models are designing the wrong memory hierarchy. Tapeout decisions made in 2026 for devices shipping in 2027 and 2028 will run 2028-era models; the dominant edge inference workload is already moving toward block-diffusion architectures. An edge inference SoC that lacks explicit block-immutable KV management at the memory interface will underperform that workload by 3-4x on energy alone. That is large enough to show up in product comparisons before the next tape-out cycle.