Broadcom reported $10.8 billion in AI semiconductor revenue in Q2 FY2026, up 143% year-over-year, and CEO Hock Tan announced the company will now sell custom AI chips only rather than the full rack-scale systems it previously offered. The chips-only decision is more diagnostic than strategic: it confirms that the silicon design layer, not systems integration, is where hyperscaler value concentrates.
Broadcom co-designs XPUs (application-specific accelerators) with individual customers over 18- to 24-month design cycles. Google's TPUs, Meta's MTIA, Anthropic's inference chips, and OpenAI's Project Titan (Broadcom-manufactured on TSMC N3, targeting H2 2026 deployment) are all in this portfolio. Q3 guidance projects AI semiconductor revenue above $16 billion, up over 200% year-over-year. The full-year FY2026 projection sits at $56 billion in AI semi revenue. Industry trackers expect custom ASIC shipment volume to exceed merchant GPU volume growth in 2026 for the first time.
The implication for hardware teams is structural: inference optimization has moved from software tuning on general-purpose GPU hardware to co-designing the silicon. At hyperscaler scale, the decision is no longer "buy H100 or H200" but "what matrix multiply dimensions and memory hierarchy does our model actually need." Teams without a chip design pathway are now at a permanent cost and latency disadvantage against teams that have one. The mid-tier AI companies (large enough to need inference at scale, but too small for a two-year ASIC program) are the most exposed. Watch for Broadcom to announce a lower-barrier XPU engagement tier within 18 months, as the design tooling to make custom silicon cheaper continues to improve.