Caliptra now builds field-programmable gate array (FPGA) images for its 2.1 release and its latest hardware design in one automated matrix. Caliptra is an open security block for chips. The FPGA image lets firmware teams run that block on a programmable chip before custom silicon exists. Keeping both lines in the same continuous integration (CI) job turns backward compatibility from a release-week check into something every change has to preserve.
The change adds a second build path, updates the packaging scripts for the current hardware, and selects the right top-level wrapper for each version. A firmware patch that only works against the newest register map can now fail beside the older image instead of surprising a team that still has 2.1 boards on its bench. That matters for a security block because firmware updates often outlive the hardware revision that introduced them.
The useful test comes next: project maintainers should add one shared boot and attestation test that runs against both images. If the two builds keep compiling but behave differently, the matrix will have preserved packaging while missing the compatibility problem engineers actually care about.