The chiplet hype has always implicitly promised a future where system integrators snap together dies from multiple vendors like LEGO bricks. This piece from Semiconductor Engineering is a useful reality check: UCIe and BoW solved the lowest layer of the problem -- physical signaling between dies -- and that's been enough for the current generation of intra-company chiplet designs where one vendor controls everything. A true cross-vendor marketplace requires something much larger.
Synopsys' Rob Kruger lays out the missing stack: system architecture conventions, address-map standards, security and trust frameworks (chiplet identity, root-of-trust across die boundaries), coordinated boot and power-on sequencing, power delivery negotiation, and multi-die test infrastructure. Each one is its own standardization project, and several don't yet have first drafts. The sheer scope of this list is why skeptics argue the chiplet marketplace vision is a decade away, not three years.
The test angle is the one most designers underestimate. Known-good-die qualification becomes a bilateral contract problem when dies come from different vendors: who sets the KGD criteria, who bears the cost of yield losses from another vendor's dies, and how do you validate a die-to-die interface that neither party fully owns? The semiconductor industry figured out KGD for HBM because there were a small number of players and enormous economic incentives. Extending that to a general marketplace with hundreds of chiplet vendors is a different problem entirely, and the standards bodies have barely started on it.