Yield estimation for high-sigma circuits fails as dimension grows: surrogate models that locate failure centers through iterative gradient training collapse under the class imbalance of rare-failure sampling. For a 6T SRAM cell array with 1,152 device parameters, the strongest existing baseline hits 25.8% relative error. HOLMES, presented at ICCAD 2026, eliminates the training loop entirely.
The mechanism is a recast of the problem: failure-center localization becomes few-shot binary classification, run as gradient-free in-context inference in a single forward pass through a tabular foundation model. No iterative training means no collapse under class imbalance. HOLMES pairs this with an SVD-based anisotropic proposal that captures the local geometry of the failure manifold, and an adaptive mixing scheme that stabilizes importance weights where conventional adaptation breaks down.
The practical target is yield sign-off on advanced-node SRAM, blocks that appear in HBM stacks, in-package memory, and every AI accelerator shipped at volume. As design complexity grows (more parameters per cell, larger arrays, tighter process nodes), the estimation problem gets harder in exactly the dimension-scaling direction where prior methods degrade. A yield estimator that holds accuracy at D=1,152 today is worth dropping into sign-off evaluation now, before D keeps climbing.