Designing chiplet systems for hybrid Transformer-Mamba LLMs means navigating a joint space of chiplet composition, placement, inter-chiplet bandwidth, batching, and runtime scheduling. That space is too large to explore exhaustively by hand, and the failure mode is getting it wrong at tape-out time. HYDRA automates the search, reaching 2.3x throughput and 43.7% lower time-to-first-token against state-of-the-art baselines (accepted at ESWEEK 2026).
The key move is treating architecture and runtime policy as a single co-optimization target rather than two sequential decisions. Prior chiplet DSE frameworks fix static configuration first, then optimize runtime independently. HYDRA couples chiplet composition and placement with elastic task scheduling and communication-aware placement in one search loop, using a Markov-based performance estimator that captures multi-tenant dynamics without requiring full simulation of each candidate. The result is that the framework can evaluate what prior approaches would require weeks of manual exploration to approximate.
The parallel to what happened in digital synthesis is direct: the first teams that handed routing to an automated tool saw faster iteration than the teams that treated it as senior-engineer craft. The transition from "chiplet architect discretion" to "tool-assisted design space search" is happening on the same trajectory, just a decade later. Teams doing chiplet platform work for inference workloads that are not yet running systematic DSE are leaving performance on the table. HYDRA or something like it becomes load-bearing infrastructure for the next generation of chiplet AI SoCs.