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SignalRISC-V International

RISC-V Crosses Into Production: Automotive and IoT Ship at Scale

Embedded World 2026 confirmed RISC-V is past the exploratory phase: Andes shipped over one million units in a consumer smartwatch, Nuclei has billions of SoCs deployed, and Infineon committed AURIX to RISC-V for next-generation automotive MCUs.

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Infineon committing the AURIX brand to RISC-V pulls automotive toolchain certification into an open ISA, compressing the time from architecture decision to safety-qualified production for embedded teams.

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At Embedded World 2026 (Nuremberg, March 10-12), the RISC-V Pavilion confirmed the vocabulary has shifted from exploratory to operational. Andes Technology reported over one million consumer units shipped on AndesCore -- the Amazfit T-Rex 3 Pro smartwatch. Nuclei Systems reported 300+ global licensees and billions of SoCs deployed in Asia. Infineon announced that the next AURIX automotive MCU family will be RISC-V, alongside demonstration of zonal and software-defined vehicle platform architectures.

AURIX is Infineon's embedded MCU line for engine control units, ADAS, and powertrain systems -- safety-critical applications where an unproven ISA is not an option. Infineon committing the brand to RISC-V is not a research prototype. It is a multi-year product commitment that pulls safety toolchain vendors, RTOS vendors, and automotive Tier 1s into RISC-V certification whether they planned to or not. If AURIX ships on RISC-V, every firmware team that targets AURIX-class applications has to evaluate RISC-V. That is the forcing function the open ISA community has been waiting for.

The load-bearing technical piece is the Quintauris Altair specification, a RISC-V profile for embedded and automotive use, presented at the show. Profiles define which extensions are required, which are optional, and which are forbidden for a given application class. Automotive has ASIL-D requirements that the base RISC-V spec does not address -- functional safety certification requires a defined, stable, auditable ISA surface. Altair is the scaffolding that makes AURIX on RISC-V certifiable. Without a profile, every SoC vendor would define their own subset, fragmenting the toolchain market and making per-customer certification the norm.

The question to track now is not whether RISC-V wins in automotive -- Infineon settled that. The question is which toolchain vendor ships the first ASIL-certified compiler and debugger that runs in CI. IAR was demonstrating the Quintauris RT-Europa reference platform at Embedded World. GCC is the other contender. The team that ships CI-native safety tooling for RISC-V automotive first will capture a large share of new design starts over the next five years, because switching toolchains mid-program in automotive costs 18-24 months of re-qualification.

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