The AI interconnect debate is over. Tower Semiconductor announced $1.3 billion in committed silicon photonics contracts for 2027, plus $290 million in customer prepayments for capacity reservation. You do not prepay a foundry for technology that is still in question. The photonic interconnect layer for AI infrastructure is now production-committed, not roadmap.
The mechanism is foundry economics. Tower's SiPho business covers pluggable optical transceivers, Near-Packaged Optics (NPO), and Co-Packaged Optics (CPO) across more than 50 active customers and multiple fabs in Israel, the US, and Japan. The $290 million in prepayments locks in physical capacity before competitors can book it. The 2028 contracts are described as "substantially higher" than 2027, with Tower targeting $2.8 billion in revenue and $750 million net profit. That is a foundry running at scale on a single technology family, not a specialty line.
The constraint being removed is not bandwidth. Electrical interconnects could always deliver more bandwidth with more copper. The constraint is power per bit at scale: copper interconnects at 1.6T speeds in a data center running 500 megawatts are a thermal and density problem, not an engineering challenge. Silicon photonics at NPO and CPO distances solves the power-per-bit equation. Tower's committed book of business tells you the hyperscalers building the next AI clusters already know this.
Teams designing AI accelerators or high-density compute modules for 2027 production that still have electrical SerDes as the primary interconnect assumption should revisit that assumption. The foundry capacity for photonic alternatives is contracted. The question is whether your design schedule allows for a PDK and packaging flow evaluation this year. If not, your next design cycle will be late to a transition that Tower's customers already made.