TSMC and Amkor signed a 10-year agreement on June 16 to build CoWoS and 3D-IC packaging capacity in Arizona, with Amkor's Peoria campus starting production in 2028 and TSMC's own Arizona packaging facility following in 2029. The supply chain argument against US chip independence has always had a second stage: yes, but you still have to send the wafers to Taiwan for packaging. This deal is a direct attack on that second stage.
Under the agreement, TSMC will procure advanced packaging and testing services from Amkor under a structured framework as both companies scale Arizona capacity. CoWoS is the packaging step that puts HBM memory stacks next to AI accelerator dies. It is required by every H100, GB200, and MI300 class chip. Having it domestically eliminates the Taiwan-to-Arizona-to-Taiwan packaging round trip that currently adds weeks and transpacific logistics cost to every advanced chip shipment. The chiplet era made packaging a first-class design constraint, not a backend afterthought, and what TSMC and Amkor are building is not commodity OSAT. It is the same CoWoS and SoIC technology that ships out of Hsinchu today.
The domestic AI chip stack now has a credible end-to-end path: 2nm wafers at Arizona Fab 21, CoWoS packaging at Amkor Peoria, test at the same campus. The argument that advanced packaging requires Taiwan-based infrastructure expires in 2028, not 2035. The companies whose competitive positioning depends on "US chips still need Taiwan for packaging" have about 24 months before that argument stops working as a procurement lever.