The open xc6slx9 place-and-route flow added a board test for initialized lookup-table memory on a Spartan-6 field-programmable gate array (FPGA). Lookup tables normally implement logic, but the chip can also use them as small memories and shift registers whose starting bytes must be encoded into the bitstream correctly.
The test writes known patterns into 64-entry memory, 32-entry memory, and a shift register, then reads every initial value before making any write. It found an error in the flow's vendor-format exporter: the equation for one 32-entry memory output used the whole lookup table. The open bitstream was already correct, but the vendor's Integrated Synthesis Environment (ISE) build tool read that exported description differently and produced 60 wrong initial values on the board. After the fix, the open and vendor bitstreams are byte-identical for this test and both pass on hardware.
Matching a vendor file is useful, and making the board read back the expected bytes is stronger. Each new memory type covered this way reduces the chance that an open flow's clean build hides a configuration error that appears only after programming the chip.